In spite of reports indicating the discontinuation of Hyper-Threading in upcoming desktop processors, Intel has showcased a remarkable new chip featuring an astonishingly high number of threads emanating from each core. Typically, contemporary AMD and Intel CPUs offer two threads per core through their current simultaneous multi-threading technology. However, this novel optical chip is displaying an astounding 66 threads per core. Rather than merely hyper-threading, it appears to be more akin to a super-mega-ultra-hyper-threading.
The annual Hot Chips conference, which took place this week, served as a platform for industry participants to present their latest technological advancements and provide a glimpse into future developments.
This chip is intriguing for several reasons. Firstly, it introduced a direct mesh-to-mesh photonic fabric, a technology that could potentially shape the future of advanced package interconnections, especially as the industry moves away from monolithic designs. The demand for faster and lower-latency chip or tile interconnections is becoming increasingly vital.
Optical technology, however, is not limited to inter-die communication. According to Intel, this technology can also facilitate multi-processor communication, even between racks through a HyperX optical network, making it a highly promising solution for immensely scalable parallel workloads.
Remarkably, the chip in question is not some exotic, unconventional creation. Aside from the optical router components, it bears similarity to chips currently available in the market. It is a multi-chip design, constructed using Intel’s EMIB technology, featuring a die area of 316mm², 1.2 billion transistors, and a TDP (thermal design power) of a mere 75W, with the majority of power consumption attributed to the optical interconnections and routers.
Interestingly, this chip was manufactured using TSMC’s 7nm process, not Intel’s own, and it adopts a RISC (Reduced Instruction Set Computer) architecture, diverging from Intel’s historical specialization in the x86 architecture.
Such a design is best suited for highly parallel workloads that do not heavily stress other components of the core. Intel asserts that this chip is particularly valuable for specific tasks, such as DARPA’s HIVE graph analytics tool, and it can deliver a 1000x improvement in performance per watt under such workloads compared to conventional computing solutions.
However, it’s worth noting that we are unlikely to see CPUs with extremely high thread counts in gaming rigs anytime soon. Games typically benefit from a few high-performance cores and ample cache rather than an exceedingly high number of threads. While the majority of gamers utilize CPUs with four or six cores, or laptops with similar configurations, it’s challenging to envision game developers optimizing performance across hundreds of threads in the near future.
The emergence of optical interconnect technology is a development worth monitoring closely. Several companies are actively researching similar technologies. Given that latency is a significant concern for gamers, if inter-chiplet or inter-tile communication on the same package can be engineered to provide the same high bandwidth and low latency as a monolithic die, it could bring about substantial improvements.
